From f3a4eb9253826d1e49e682314c8666b28fa0b717 Mon Sep 17 00:00:00 2001 From: Yang Zhang Date: Tue, 10 Sep 2013 16:41:35 +0200 Subject: [PATCH] Nested VMX: Clear bit 31 of IA32_VMX_BASIC MSR The bit 31 of revision_id will set to 1 if vmcs shadowing enabled. And according intel SDM, the bit 31 of IA32_VMX_BASIC MSR is always 0. So we cannot set low 32 bit of IA32_VMX_BASIC to revision_id directly. Must clear the bit 31 to 0. Signed-off-by: Yang Zhang Reviewed-by: Andrew Cooper --- xen/arch/x86/hvm/vmx/vvmx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c index 5ef5ad7385..f385c02282 100644 --- a/xen/arch/x86/hvm/vmx/vvmx.c +++ b/xen/arch/x86/hvm/vmx/vvmx.c @@ -1826,7 +1826,7 @@ int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content) switch (msr) { case MSR_IA32_VMX_BASIC: data = (host_data & (~0ul << 32)) | - ((v->arch.hvm_vmx.vmcs)->vmcs_revision_id); + (v->arch.hvm_vmx.vmcs->vmcs_revision_id & 0x7fffffff); break; case MSR_IA32_VMX_PINBASED_CTLS: case MSR_IA32_VMX_TRUE_PINBASED_CTLS: -- 2.30.2